Customer version. Draft 2026-11-03. Not an NVIDIA reference architecture.
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Back to the pattern
Companion

Cisco RA coverage map

Customer version, 2026-11-03. Companion to the Open Ethernet deployment pattern. Section numbers follow the rebuilt RA (rail block naming, NVL72 sections, the NVIDIA language section 1).

Sources for the Cisco outline:

  • [C1] Cisco N9000 Enterprise RA, HGX B300 (read 2026-08-26). The Hyperfabric HGX B300 RA has the identical section structure with HF6100 switches; it is covered by the same rows.
  • [C2] Cisco N9000 Cloud RA with HGX H200, NCP compliant (read 2026-08-26). Rows 31 to 41 are the sections and requirements it adds beyond C1.
  • [C4] Cisco EBox NCP HGX High Performance Storage RA, 2026, for the storage rows.

Status values: Matched (an Edgecore section answers the same point), Partial (answered in part, or answered with an open item), N/A (outside what a switch vendor supplies, or deliberately excluded by the positioning), Gap (Cisco has it, we do not).

Part 1

1Step 1 and Step 2: Cisco outline mapped to Edgecore coverage

# Cisco section Requirement or point it addresses Edgecore RA section Open Ethernet with Edgecore Alongside NVIDIA NCP Status Tag Source for our answer
1 Introduction [C1] On prem AI cluster blueprint, adheres to NVIDIA HGX B300 ERA, up to 1,024 GPUs; one switch family for frontend, storage, backend, OOB; controller managed 2, cover Open blueprint, 256 to 2,048 GPUs, one switch model; no NVIDIA ERA adherence claimed Frontend, storage, OOB only Matched VERIFIED / INFERRED E4; S6; L Q1
2 Hardware: HGX B300 Rack Server [C1] C-G-N-B naming; 8x B300 on NVLink; 8x CX-8 east west; 1 or 2 BF3 B3240 north south; NVIDIA-Certified servers 5.1 Any HGX B300; same NIC roles Same Matched VERIFIED S6 Table 5; C1
3 Cisco N9364E-SG2-O [C1] 2RU, 64 x 800G OSFP (128 x 400G), leaf and spine 5.1, 16 AIS800-64O, 2RU, 64 x OSFP800, 2 x 400G breakout, TH5 Frontend and storage Matched VERIFIED E1
4 Cisco N9164E-NS4-O [C1] Spectrum-4 alternative for east west 2, 9 Not applicable (open fabric) East west is NVIDIA's N/A VERIFIED S2; IPR
5 Cisco Nexus 9332D-GX2B [C1] 32 x 400G storage leaf 11.1, 11.2, 16 AIS800-64O storage leaf pair; AIS800-32O optional Same Matched VERIFIED E1; E2; E4
6 Cisco Nexus 93108TC-FX3 [C1] 48 x 1/10GBASE-T management switch with 100G uplinks 11.3 EPS201 48 x 1G, 25G and 100G uplinks; no 10GBASE-T host management switch Same Partial VERIFIED / gap G7 E3
7 Cisco UCS C225 M8 [C1] Support, control and storage servers cover Ports reserved via frontend; servers customer supplied Same N/A n/a n/a
8 Cisco Optics and cables, Table 1 [C1] Optic per device incl. riding heat sink OSFPR for CX-8 5.6, 16 ET8001-2DR4, ET7512-DR4 part numbers; specs and CX-8 fit UNKNOWN Frontend only Partial UNKNOWN E4; gap G4
9 Networking topologies: Overview [C1] Three separate fabrics: compute, converged, OOB 1.1 Four networks (adds storage leaves) Three of four Matched VERIFIED S1; N1 Ch.4
10 Compute (east west) network, Tables 2 and 3 [C1] CX-8 2 x 400G; single and dual plane, dual recommended; switch, transceiver, cable counts 5.2, 5.3, 5.4, 5.5 Single plane 800G per GPU baseline; dual plane option with counts NVIDIA owned Matched VERIFIED / INFERRED E4; C1
11 Converged (north south) network, Table 4 [C1] 2 x 400G per node to two switches; 12.5 Gbps per GPU storage reserve; ports for support servers 11.1 Dual homed 2 x 400G; 12.5 to 50 Gbps per GPU storage uplink Same Matched INFERRED E4
12 Out of band management network [C1] 1G BMC, 1G DPU BMC, 10G host ports; switch mgmt ports; 100G uplink to converged spine 11.3 6 x 1G per server per S6, plus switch mgmt; 10G host ports not counted Same Partial VERIFIED / gap G7 E4; E3
13 Topology with 16 nodes [C1] 128 GPU drawing and counts 5.4 Backend counts only, no drawing Frontend not sized Partial INFERRED arithmetic
14 Topology with 32 nodes [C1] 256 GPU drawing and counts 5.3, 5.2 Full counts and drawing Frontend counts Matched VERIFIED design E4 slide 4
15 Topology with 64 nodes [C1] 512 GPU drawing and counts 5.3, 11.1 Full counts and drawing Frontend counts Matched VERIFIED design E4 slide 5
16 Topology with 128 nodes [C1] 1,024 GPU drawing and counts 5.4 Backend counts only; frontend not sized Not sized Partial INFERRED arithmetic
17 Cluster BOM, single plane, Table 5 [C1] PIDs and quantities per cluster size 16 Model, role, quantity, no prices Reduced BOM Matched VERIFIED design E4 slides 7 to 9
18 Cluster BOM, dual plane, Table 6 [C1] Same for dual plane 5.5 Switch counts only, no separate BOM n/a Partial INFERRED arithmetic
19 High-Performance Storage [C1] VAST EBox, NVIDIA-Certified storage; other certified partners allowed 11.2 Generic partner integration, RoCEv2 QoS spec, N1 targets; certification not documented for Edgecore Same Partial VERIFIED / UNKNOWN C4; N1 Table 5.2
20 Software: Network controller [C1] Nexus Dashboard plus Ansible, Chef, Puppet 13 Open tooling, ZTP, config as code; no Edgecore controller documented Same Partial INFERRED n/a
21 Software: Compute controller [C1] Intersight or BCM cover Out of scope Same N/A n/a n/a
22 Software: Storage controller [C1] VAST management cover, 11.2 Storage vendor's Same N/A n/a n/a
23 NVIDIA AI Enterprise, NIM [C1] Host software suite 12 Unaffected by switch choice Same N/A n/a C1
24 NVIDIA Spectrum-X [C1] Spectrum-X benefits via FGLB license on Silicon One; native on NS4 9 Honest comparison; Spectrum-X not available; TH5 DLB, GLB NVIDIA owned on CIN Partial VERIFIED / UNKNOWN E1; N1 4.1; E9
25 Security [C1] Cisco security portfolio, beyond RA scope 14 Platform RoT and TPM; VRF separation; no security product Same Partial VERIFIED E1
26 Observability [C1] Splunk, beyond RA scope 13 Silicon in band telemetry; collector is customer choice Same Partial VERIFIED / INFERRED E1
27 Testing and certification [C1] NVIDIA-Certified systems and storage; HPC, IB PerfTest, NCCL, MLPerf run 15 Plan only; the public collective benchmark on AMD GPUs with Broadcom NICs; no certification Same Gap VERIFIED partial E9
28 Summary [C1] Scalable, easy to manage, high performance cover Executive summary Same Matched n/a n/a
29 Appendix A: Compute server spec [C1] CPUs, memory, 8x CX-8, BF3 B3240, host mgmt NIC 5.1 Node network interface table; rest is the server vendor's Same Partial VERIFIED S6; C1
30 Appendix B: Control node spec [C1] Support server minimum spec cover Out of scope Same N/A n/a n/a
31 Two tier east west with 32 node SU and rail groups [C2] SU = 32 HGX nodes, rail groups, one hop inside SU, tenant efficiency 5.2, 14 Same 32 node size, the Edgecore rail block; one leaf per rail NVIDIA owned Matched VERIFIED E4; C2
32 Three tier east west, SU groups, super spine [C2] SU group of 4 SUs; super spine groups; scale to 32K GPUs 7 Pod of 4 rail blocks; 32 super spine planes; to 65,536 GPUs; dual plane alternative NVIDIA owned Matched INFERRED E1 arithmetic
33 NCP compliance on east west [C2] N9164E-NS4-O for compliance; Silicon One "without NCP compliance" 2, 17 row 5 Explicitly non NCP Edgecore excluded from the CIN (IPR NET-2) N/A VERIFIED S2; IPR NET-2; L Q20
34 Converged north south storage and management [C2] Storage access, host management from management nodes, border, data lakes 11.1, 11.2 Covered Covered Matched INFERRED E4
35 Switch management network [C2] Separate 1G network for switch mgmt ports 11.3 Counted in OOB Same Matched VERIFIED design E4
36 BlueField-3 management network [C2] DPU BMC ports on 1G 11.3 Inside NVIDIA's 6 x 1G per server count [S6] Same Partial INFERRED C1 port list
37 Miscellaneous service network [C2] PDUs, terminal servers on 1G 11.3 Drawn, not counted Same Partial INFERRED n/a
38 Multitenancy [C2] VXLAN with BGP EVPN; vrfOOBMgmt, vrfStorageInternal, per tenant Frontend and Backend VRFs 11.1, 14 Same VRF model; backend EVPN on RoCE UNKNOWN Frontend only Partial INFERRED / UNKNOWN C2; S3; gap G6
39 Workload orchestration [C2] Tenant management nodes for provisioning, Slurm, Kubernetes 11.1 Reachable via tenant frontend VRF; nodes customer supplied Same N/A n/a n/a
40 Edge and border connectivity [C2] Border leaves, L3 routing, VXLAN inside the fabric 11.1, 17 rows 23 and 24 AIS800 as border; ZR, ZR+ DCI per datasheet Same Matched VERIFIED / INFERRED E1
41 High availability tests (switch and link failure) [C2 Testing] HA tested 15 test 8 Planned, no result published Same Gap UNKNOWN section 15 test 8
Part 2

2Coverage statistics

Status Count Rows
Matched 16 1, 2, 3, 5, 9, 10, 11, 14, 15, 17, 28, 31, 32, 34, 35, 40
Partial 16 6, 8, 12, 13, 16, 18, 19, 20, 24, 25, 26, 29, 36, 37, 38, 41
N/A 8 4, 7, 21, 22, 23, 30, 33, 39
Gap 1 27 (testing and certification)
Total 41

Of the 33 rows that apply to a switch vendor (41 minus 8 N/A), 16 are matched (48 percent), 16 partial (48 percent) and 1 is a gap (3 percent).

Part 3

3NVIDIA and NCP requirement rows (not Cisco sections)

These are checked in the compliance matrix, section 17 of the RA:

  • NVIDIA DGX SuperPOD B300 Ethernet [N1]: SU concept (64 nodes), rail aligned compute, twin plane, storage 1:1 and about 4:3, VXLAN EVPN segmentation, OOB on its own VXLAN, customer edge 2 x 100GbE DR1 with BGP, storage performance guidelines.
  • NCP [S1, S2, IPR, R24]: TAN and SMN always Ethernet; CIN InfiniBand or Spectrum-X; IPR NET-1 BlueField-3 north south; IPR NET-2 east west InfiniBand or Spectrum-X; IPR NET-5 BGP EVPN; IPR NET-6 EVPN VXLAN; IPR STO-2 RDMA storage; R24 NET01, CNP08, CNP10, SDN04, SDN09, SEC12, SEC13, SEC16, SEC18. The R24 exception clause governs R24's own baseline only.